Título
Alternative post-processing on a CMOS chip to fabricate a planar microelectrode array
Autor
FRANCISCO LOPEZ HUERTA
AGUSTIN LEOBARDO HERRERA MAY
JOHAN JAIR ESTRADA LOPEZ
CARLOS ZUÑIGA ISLAS
BLANCA AURORA CERVANTES SANCHEZ
BLANCA SUSANA SOTO CRUZ
Nivel de Acceso
Acceso Abierto
Materias
Resumen o descripción
We present an alternative post-processing on a CMOS chip to release a planar microelectrode array (pMEA) integrated with its signal readout circuit, which can be used for monitoring the neuronal activity of vestibular ganglion neurons in newborn Wistar strain rats. This chip is fabricated through a 0.6 μm CMOS standard process and it has 12 pMEA through a 4 × 3 electrodes matrix. The alternative CMOS post-process includes the development of masks to protect the readout circuit and the power supply pads. A wet etching process eliminates the aluminum located on the surface of the p+-type silicon. This silicon is used as transducer for recording the neuronal activity and as interface between the readout circuit and neurons. The readout circuit is composed of an amplifier and tunable bandpass filter, which is placed on a 0.015 mm2 silicon area. The tunable bandpass filter has a bandwidth of 98 kHz and a common mode rejection ratio (CMRR) of 87 dB. These characteristics of the readout circuit are appropriate for neuronal recording applications.
Editor
Sensors MDPI
Fecha de publicación
2011
Tipo de publicación
Artículo
Versión de la publicación
Versión aceptada
Recurso de información
Formato
application/pdf
Idioma
Inglés
Audiencia
Estudiantes
Investigadores
Público en general
Sugerencia de citación
López-Huerta, F., et al., (2011). Alternative post-processing on a CMOS chip to fabricate a planar microelectrode array, Sensors, (11):10940-10957
Repositorio Orígen
Repositorio Institucional del INAOE
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