Título
Highly-Linear/Highly-Efficient CMOS power amplifier for mobile WiMAX
Autor
LUIS ABRAHAM SANCHEZ GASPARIANO
Colaborador
ALEJANDRO DIAZ SANCHEZ (Asesor de tesis)
Anne_Johan Annema (Asesor de tesis)
Nivel de Acceso
Acceso Abierto
Materias
Resumen o descripción
The present work is about the design of a power amplification system in
CMOS technology which satisfies the demands established by the IEEE802.16e-
2005 standard for mobile WiMAX.
The simulation in CadenceVirtuoso v5.0.0. of the complete power amplification
stage with the UMC 0.18μm Mixed Mode and RF CMOS technology
was carried out. The RF band for which the circuit was tuned to operate was
between 2.496GHz and 2.69GHz with an LO signal running from 2.486GHz to
2.68GHz and a BB signal of 10MHz. The power supply for the predriver stage
was of 1.8V and 0.9V for the amplification stage. The total power consumption
of the circuit was of approximately 26dBm. The peak output power obtained was
23dBm with a drain efficiency, ηD, of 83% and a Power Added Efficiency, PAE, of
61% meanwhile for 12dB of output power back-off the ηD was 33% and the PAE
31%. The harmonic suppression around the carrier in a range of 194MHz at from
2.496GHz to 2.69GHz presents a minimum value of -55dBc. These results indicate
that the proposed multipath polyphase Power Amplifier exhibits both, a high
linearity achieving until -60dBc of intermodulation suppression with respect to
the frequency of interest, (ωLO + ωBB), within the mobile WiMAX bandwidth,
and a high PAE at peak output power and with 12dB of output power back-off.
In addition, the design and fabrication of the predriver stage was also realized
but in a double poly three metal layers 0.5μm CMOS technology from MOSIS
foundry. The fabricated prototype area was 0.472μm × 0.148μm. The prototype
was characterized with an LO frequency of 80MHz and a BB frequency of 1.6MHz.
The power supply was of 3.3V. The tuning control was of 400mV ranging from
1.0V to 1.4V. The maximum power consumption was 14.5dBm and the minimum
was 12.6dBm. The maximum output power was 6.5dBm meanwhile the minimum
was 0.3dBm. The duty cycle of the prototype was modifiable in a range of 9.3%
from 49.4% to 40.1%. Finally, the maximum pulse amplitude of the output signal
was 1V and the minimum pulse amplitude covers from 950mV to 200mV. According
to these results, we conclude that the behavior of the predriver stage follows
the curse anticipated in the synthesis. This is very important since the predriver
stage is the key building block to enhance the efficiency of the overall system.
Editor
Instituto Nacional de Astrofísica, Óptica y Electrónica
Fecha de publicación
junio de 2011
Tipo de publicación
Tesis de doctorado
Versión de la publicación
Versión aceptada
Recurso de información
Formato
application/pdf
Idioma
Inglés
Audiencia
Estudiantes
Investigadores
Público en general
Sugerencia de citación
Sanchez-Gaspariano L.A.
Repositorio Orígen
Repositorio Institucional del INAOE
Descargas
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