Author: ESTEBAN TLELO CUAUTLE
ESTEBAN TLELO CUAUTLE (2007)
It is presented a method to design Current-Mode (CM) filters from the transformation of the well-known Voltage-Mode (VM) opamp-RC filters. First, it is shown the simulation of a low-frequency opamp-RC filter with stable high Q, by applying the Y-Δ transformation. Second, it is described the transformation of the VM opamp-RC filter to a VM Gm-C filter and the symbolic transfer functions of the VM Gm-C filter are derived. Third, it is shown the transformation of the VM Gm-C filter to a CM Gm-C filter and the symbolic transfer functions of the CM filter are derived to show that both, the VM and the CM Gm-C filters perform the same behavior. Finally, some guidelines are introduced to design CM filters with CMOS OTAs and current conveyors.
ESTEBAN TLELO CUAUTLE (2008)
This work presents the design of switched current sigma delta modulators. The nullor approach is adopted to synthesize voltage followers used to design translinear-loop-based switched current memory cells. Besides, it is proposed an approach for computing optimal biases and sizing of transistors forming the modulator. This heuristic allowed us sampling a second order modulator up to 80MHz, ensuring more than 60dB of SNR.
A MATLAB program is presented to design Chua’s circuit by applying state-variables at the behavioral level of
abstraction. The user can interact with the program to calculate state trajectories by modifying the values of five
circuit-elements: a resistor, two capacitors, an inductor and a nonlinear resistor, i.e. Chua’s diode (NR). NR is modeled
by a piecewise-linear i–v characteristic which is synthesized further by analog building blocks at the transistor level of
abstraction. Finally, Chua’s circuit is simulated by using SPICE and standard CMOS integrated-circuit technology, whose
results are in good agreement with MATLAB.
Se presenta el diseño de un amplificador operacional retroalimentado en corriente (CFOA) usando la tecnología estándar CMOS de 0.35 μm de AMS (Austria Micro Systems). El diseño está basado en la conexión en cascada de un Current Conveyor de Segunda Generación Positivo (CCII+) y un seguidor de voltaje (VF). Los voltajes de alimentación son de ±2.5 V y una corriente de polarización de 20 μA. El CFOA se aplica al diseño de un filtro universal bicuadrático modo mixto y se extiende a la implementación de un oscilador caótico basado en el diodo de Chua (NR). Los resultados de simulación en SPICE, muestran la utilidad del CFOA para realizar filtros en modo voltaje y modo corriente, así como para generar secuencias de comportamientos caóticos.
Modeling and simulation of a chaotic oscillator based on saturated nonlinear functions (SNLFs) are presented for the synthesis of n-scrolls attractors. First, the oscillator is simulated at the electronic system level by applying state variables and piecewise-linear approximation. Second, the dynamic ranges are scaled to control the breaking points and slopes within practical values. Additionally, the frequency scaling of n-scrolls attractors is performed. Finally, the SNLF is synthesized using operational amplifiers to generate 2, 3, 4, 5 and 6- scrolls attractors. Theoretical results are confirmed by SPICE simulations to show the usefulness of the proposed synthesis approach.
Se presenta un sistema basado en MatLab para
modelar y simular un oscilador caótico al nivel de abstracción de
sistema. Se selecciona el circuito de Chua para describir los
fenómenos caóticos. De esta manera, el resistor no-lineal (Diodo
de Chua) se modela por una característica I-V lineal a tramos
cuya corriente y rangos de voltaje pueden variarse por el
usuario. Se muestra como generar una secuencia de
comportamientos caóticos variando el valor del resistor lineal.
Los resultados de simulación se grafícan en dos y tres
dimensiones. Finalmente, se describen brevemente algunas
consideraciones para la síntesis del oscilador caótico usando
tecnología CMOS estándar de circuitos integrados.
The design of single-resistance-controlled oscillators (SRCOs) is presented by
using current followers (CF) and voltage followers (VF). First, the design of the
followers is described by using SPICE and standard CMOS technology of
0.35 µm. Second, a SRCO is simulated in SPICE by using the designed CF and
VF. Third, the SRCO is simulated in Verilog-A by using ideal and real
behavioural models for the followers. Finally, the good agreement on the
simulation results leads us to conclude on the usefulness to combine SPICE and
Verilog-A to enhance analogue integrated circuit design.
The pathological elements voltage mirror (VM) and current mirror (CM) have shown advantages in analog behavioral modeling and circuit synthesis, where many nullor-mirror equivalences have been explored to design and to transform voltage-mode circuits to current-mode ones and viceversa. However, both the VM and CM have not equivalents to perform automatic symbolic circuit analysis. In this manner, we introduce nullor-equivalents for these pathological elements allowing to include parasitics and to perform only symbolic nodal analysis. The nullor-equivalent of the CM is extended to provide multiple- outpus (MO-CM). Finally, two active filters containing VMs, CMs and MO-CMs are analysed to show the usefulness of the models.
This paper proposes new admittance matrix models to approach the behavior of fully-differential Operational Transresistance Amplifiers (OTRAs) and Current Operational Amplifiers (COAs). The infinity-variables method is used in order to derive the new generalized models. As a consequence, standard nodal analysis being improved to compute fully-symbolic small-signal characteristics of fully-differential analog circuits.
This paper proposes new pathological element-based active device models which can be used in analysis tasks of linear(ized) analog circuits. Nullators and norators along with the voltage mirror-current mirror (VM-CM) pair (collectively known as pathological elements) are used to model the behavior of active devices in voltage-, current-, and mixed-mode, also considering parasitic elements. Since analog circuits are transformed to nullor-based equivalent circuits or VM-CM pairs or as a combination of both, standard nodal analysis can be used to formulate the admittance matrix. We present a formulation method in order to build the nodal admittance (NA) matrix of nullor-equivalent circuits, where the order of the matrix is given by the number of nodes minus the number of nullors. Since pathological elements are used to model the behavior of active devices, we introduce a more efficient formulation method in order to compute small-signal characteristics of pathological element-based equivalent circuits, where the order of the NA matrix is given by the number of nodes minus the number of pathological elements. Examples are discussed in order to illustrate the potential of the proposed pathological element-based active device models and the new formulation method in performing symbolic analysis of analog circuits. The improved formulation method is compared with traditional formulation methods, showing that the NA matrix is more compact and the generation of nonzero coefficients is reduced. As a consequence, the proposed formulation method is the most efficient one reported so far, since the CPU time and memory consumption is reduced when recursive determinant-expansion techniques are used to solve the NA matrix.