Author: MARIA TERESA SANZ PASCUAL
MARIA TERESA SANZ PASCUAL (2010)
This paper presents a robust digitally programmable CMOS analogue processor designed for sensor output conditioning in embedded applications. In addition, system adaptability allows for correction of the deviations in circuit operation due to ageing, mismatch or environmental effects, lending a smart nature to the devices. In order to tune the free parameters of the system, two training strategies based on perturbative algorithms are compared. The processor performance is validated by adjusting the response of an angular position sensor and the insensitivity to parameter mismatch is demonstrated through high-level simulations based on Monte Carlo electrical simulation data.
MARIA TERESA SANZ PASCUAL (2009)
This work presents two current-mode integrated circuits designed for sensor signal preprocessing in embedded systems. The proposed circuits have been designed to provide good signal transfer and fulfill their function, while minimizing the load effects due to building complex conditioning architectures. The processing architecture based on the proposed building blocks can be reconfigured through digital programmability. Thus, sensor useful range can be expanded, changes in the sensor operation can be compensated for and furthermore, undesirable effects such as device mismatching and undesired physical magnitudes sensor sensibilities are reduced. The circuits were integrated using a 0.35 μm standard CMOS process. Experimental measurements, load effects and a study of two different tuning strategies are presented. From these results, system performance is tested in an application which entails extending the linear range of a magneto-resistive sensor. Circuit area, average power consumption and programmability features allow these circuits to be included in embedded sensing systems as a part of the analogue conditioning components.
A new CMOS transimpedance amplifier (TIA) with variable gain for optical fibre communication receivers is presented. The proposed configuration is realised in a low-cost digital 0.35 µm CMOS process fed from a single 1.8 V voltage supply. A 56–68 dBΩ transimpedance gain variation range is attained with 1 GHz bandwidth. The TIA shows 9 pA / p Hz input-referred spectral noise and only 6.9 mW power consumption.